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Article Details
| Paper ID | IJLREC-2013-0018 |
| Title | FPGA Implementation Of Efficient Modified VLSI Architecture For Multiplier |
| Authors | D.Vinoth, R.Vinoth, R.Srinivasan, M.M.Arun Prasath , D.Vimala |
| Volume/Issue | Vol. 1, Issue 2 |
| Year | 2013 |
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